If a semiconductor integrated circuit device is reversely mounted onto a board or into a slot, an unintended external conductor is connected to each of its external terminals. In particular, if, on reverse mounting, an external terminal is unintendedly connected to a power source line, and it has a low withstand voltage (e.g., if the external terminal is a logic signal input terminal), a large current may flow through an internal element connected to that external terminal, resulting in breakage of or heat generation in the semiconductor integrated circuit device.
To cope with such reversed mounting, there have conventionally been disclosed and proposed a semiconductor integrated circuit device on which an identification mark indicating the correct mounting orientation is attached or impressed, a semiconductor integrated circuit device whose external terminals have such a special shape to prevent reversed mounting, and a semiconductor integrated circuit device having external terminals of particular functions (power source terminals, ground terminals, and signal input/output terminals) provided each in a pair and having these arranged in diagonal positions on the package (see, for example, Patent Publications 1 and 2).
Patent Publication 1JP-A-H05-190371Patent Publication 2JP-A-H05-226585